The present invention relates to a chip carrier used for mounting a semiconductor device on a circuit wiring board and a method of manufacturing the same, and more particularly to a chip carrier for mounting the semiconductor device and for MCM (multichip module) and a method of manufacturing and mounting the same.
Semiconductor devices of BGA (ball grid array) and LGA (land grid array) package types have conventionally been known. In the semiconductor devices of these types, external connecting electrodes of a chip carrier on which a semiconductor device is mounted are arranged like a grid on the back face thereof. These semiconductor devices have the external connecting electrodes provided on the back of a package so that the size can greatly be reduced as compared with a conventional semiconductor device of a QFP (Quadflat package) type. The pitch of the external connecting electrodes is 1.5 or 1.27 mm, while the semiconductor device of a QFP type has a pitch of 0.3 or 0.5 mm. Consequently, mounting can be performed easily. For this reason, the semiconductor devices of BGA and LGA package types have attracted favorable notice.
FIG. 8 shows a semiconductor device of a BGA package type according to the prior art. In FIG. 8, 1 designates a chip carrier, 2 designates a solder ball, 3 designates a semiconductor device, and 4 designates an external connecting electrode. The chip carrier 1 has a structure in which a connecting wiring 61 is provided on a surface 60a of an electrical insulating board 60 and the external connecting electrode 4 is provided on a back face 60b of the electrical insulating board 60. The connecting wiring 61 is conducted to an electrode pad 31 of the semiconductor device 3. The connecting wiring 61 of the surface 60a and an external drawing electrode 62 of the back face 60b are electrically conducted through a wiring 64 and the like provided in a through hole 63. The through hole 63 conducts both faces of the electrical insulating board 60.
As the external connecting electrodes of a BGA package type, the solder balls 2 are arranged like a grid on the back face of the chip carrier 1. The connection to a circuit wiring board (not shown) can be obtainable by the solder balls 2. The semiconductor device of a LGA package type has a structure in which the connection to the circuit wiring board can be obtained by a solder having no ball or a socket.
As compared with the semiconductor device of a LGA package type, the semiconductor device of a BGA package type uses the solder balls for mounting so that the mounting space between the chip carrier and the circuit wiring board is large. Consequently, the semiconductor device of a BGA package type has the higher mounting reliability upon solder mounting than that of a LGA package type. For this reason, the semiconductor device of a BGA package type which has the external connecting electrodes arranged link a grid has been commonly used. However, in a semiconductor device which should be developed, for example, a CPU of a computer, the combination of the LGA and the socket is often used.
However, in the case where the conventional chip carrier of a BGA or LGA package type is mounted on the circuit wiring board by a solder, the following troubles are caused. More specifically, the chip carrier is directly connected to the circuit wiring board by the solder. For this reason, when an environmental reliability test such as a thermal shock test, which changes a temperature from xe2x88x9240xc2x0 C. to 100xc2x0 C., is given as defined by JIS C0025, the external connecting electrode portions crack, the external connecting electrodes peel off and the connection between poor due to a difference between the coefficients of thermal expansion of the chip carrier and the circuit wiring board. Thus, BGA and LGA package types have poor reliability in the thermal shock test.
It is an object of the present invention to provide a chip carrier, and a method of manufacturing and mounting the same which can prevent external connecting electrode portions from cracking and prevent external connecting electrodes from peeling off so that reliability can be enhanced.
In order to achieve the above object, the present invention provides a chip carrier comprising an electrical insulating board, a connecting wiring for connection to the electrode of a semiconductor device which is provided on a first face of the electrical insulating board, and an external connecting electrode for connection to a connecting electrode of a circuit wiring board, provided on the back face of the electrical insulating board, wherein the external connecting electrode is formed by a bump made of a conductor, and a resin layer is formed so as to cover the side of the bump. The resin layer may be formed so as to cover a solder connecting portion after mounting.
It is preferred that the resin layer is formed flatly or like a convexity around the bump and the tip portion of the bump is exposed.
It is preferred that the resin layer is formed like a layer on the back face of the electrical insulating board and the tip portion of the bump is exposed.
Preferably, the bump comprises a solder ball.
It is preferred that the bump is made of a conductor whose main component contains at least one of Sn, Cu, Ag, Au and Ni.
Preferably, the bump is covered with the resin layer to a level of 20% or more with respect to the height thereof from the chip carrier.
It is preferred that the resin is an epoxy resin.
Preferably, the thickness of the resin layer ranges from 50 xcexcm to 1000 xcexcm.
The present invention provides a method of manufacturing a chip carrier comprising the steps of providing a connecting wiring for connection to the electrode of a semiconductor device on a first face of an electrical insulating board, forming an external connecting electrode having a bump for connection to the connecting electrode of a circuit wiring board on a back face of the electrical insulating board, covering the side portion of the external connecting electrode with a resin paste, and heat-treating at a temperature at which the resin paste is hardened so that a resin layer is formed.
It is preferred that the resin paste is poured between the external connecting electrodes, and heat-treatment is performed at a temperature at which the resin paste is hardened so that the resin layer is formed.
Preferably, heat is supplied and the resin is poured into the back face on which the external connecting electrodes are provided so as to form the resin layer.
It is preferred that the back face on which the external connecting electrode made of the bump is formed is immersed in the resin paste, the chip carrier is removed from the resin, the resin layer is formed by heat-treatment at a temperature at which the resin is hardened, and a face on which the resin layer is formed is processed until the bump appears.
Preferably, the resin is sprayed on the back face on which the external connecting electrodes are provided so that the resin layer is formed thereon, and the back face on which the resin layer is formed is processed until the bump appears.
It is preferred that grinding is performed until the bump appears.
Preferably, a surface of a conductive foil is exposed and coated with the resin paste by screen printing so as to form the resin layer, heat-treatment is performed at a temperature at which the resin layer is hardened, the conductive foil is coated with the solder paste, and heat-treatment is performed at a temperature at which the solder paste is melted to form a solder bump, so that the external connecting electrode is formed.
Preferably, the resin layer made of a sheet is bonded to the back face of the chip carrier so that the resin layer is formed on the chip carrier.
It is preferred that the resin paste has a viscosity of 500 to 200000 cps.
The chip carrier according to the present invention comprises an electrical insulating board, a connecting wiring for connection to the electrode of a semiconductor device which is provided on a first face of the electrical insulating board, and an external connecting electrode for connection to a connecting electrode of a circuit wiring board, provided on the back face of the electrical insulating board, wherein the external connecting electrode is formed by a bump made of a conductor, and a resin layer is formed so as to cover the side of the bump. Accordingly, the periphery of the interface between the body and the bump of the external connecting electrode on which the greatest stress is apt to be applied is covered with the resin so that it can be reinforced. Further, the distortion stress which concentrates on the interface between the bump and the body in the thermal shock test is caused to spread over the resin layer so that the distortion stress generated in the solder portion of each electrode can be relaxed. As a result, the external connecting electrode portion can be prevented from cracking due to a difference between the coefficients of thermal expansion of the chip carrier and the circuit wiring board and the external connecting electrode can be prevented from peeling off. Consequently, the reliability in the thermal shock test can be enhanced.
According to the preferred example in which the resin layer is formed like a convexity around the bump and the tip portion of the bump is exposed, the above functions and effects can be obtained and the resin layer can be formed easily. Thus, the external connecting electrode portion can be reinforced more.
According to the preferred example in which the resin layer is formed like a layer on the back face of the electrical insulating board and the tip portion of the bump is exposed, the external connecting electrode portion can be prevented from cracking often. Further, the resin layer can be formed more easily and productivity can be enhanced. Thus, the external connecting electrode portion can be reinforced more.
According to the preferred example in which the bump comprises a solder ball, the above functions and effects can be obtained and solder coating is not required when bonding the circuit wiring board to the connecting electrode so that the number of steps can be reduced.
According to the preferred example in which the bump is made of a conductor whose main component contains at least one of Sn, Cu, Ag, Au and Ni, the above function and effects can be obtained and the connecting stability of the circuit wiring board to the connecting electrode can be enhanced so that good electrical connection can be obtained.
According to the preferred example in which the bump is covered with the resin layer to a level of 20% or more with respect to the height thereof from the chip carrier, the above functions and effects can be obtained. In particular, the external connecting electrode portion can be reinforced well by the resin layer.
The present invention provides a method of manufacturing a chip carrier comprising the steps of providing a connecting wiring for connection to the electrode of a semiconductor device on a first face of an electrical insulating board, forming an external connecting electrode having a bump for connection to the connecting electrode of a circuit wiring board on a back face of the electrical insulating board, covering the side portion of the external connecting electrode with a resin paste, and heat-treating at a temperature at which the resin paste is hardened so that a resin layer is formed. Thus, the resin layer can be formed easily. Further, the external connecting electrode portion can be reinforced well by the resin layer. As a result, the chip carrier having reliability can be manufactured readily.
According to the preferred example in which the resin paste is poured between the external connecting electrodes, and heat-treatment is performed at a temperature at which the resin paste is hardened so that a resin layer is formed, the resin layer can be formed easily and the resin can be hardened readily. Consequently, the external connecting electrode portion can surely be reinforced by the resin layer.
According to the preferred example in which heat is supplied and the resin is poured into the back face on which the external connecting electrodes are provided so as to form the resin layer, the resin is poured so that the resin layer can be formed more quickly and easily. Thus, the external connecting electrode portion can surely be reinforced by the resin layer.
According to the preferred example in which the back face on which the external connecting electrode made of the bump is formed is immersed in the resin paste, the chip carrier is removed from the resin paste, the resin layer is formed by heat-treatment at a temperature at which the resin is hardened, and a face on which the resin layer is formed is processed until the bump appears, the resin layer can be formed more quickly and easily. Thus, the chip carrier in which the external connecting electrode portion is reinforced by the resin layer can be manufactured. Further, the external connecting electrode can surely be exposed so that conduction can be ensured.
According to the preferred example in which the resin is sprayed on the back face on which the external connecting electrodes are provided, the resin layer is formed so as to cover the back face on which the external connecting electrodes are provided, and the face on which the resin layer is formed is processed until the bump appears, the chip carrier in which the external connecting electrode portion is reinforced by the resin layer can be manufactured. Further, the resin layer can be formed more quickly and easily.
According to the preferred example in which grinding is performed until the bump appears, the chip carrier in which the external connecting electrode portion is reinforced more by the resin layer can be manufactured. Further, the resin layer can be formed more quickly and easily.
According to the preferred example in which a surface of a conductive foil is exposed and coated with the resin paste by screen printing, heat-treatment is performed at a temperature at which the resin layer is hardened, the conductive foil is coated with the solder paste, and heat-treatment is performed at a temperature at which the solder paste is melted to form a solder bump so that the external connecting electrode is formed, the chip carrier in which the external connecting electrode portion is reinforced more by the resin layer can be manufactured. Further, the external connecting electrode and the resin layer can be formed more quickly and easily.
According to the present invention, the distortion stress which concentrates on a solder connecting portion in the thermal shock test is caused to spread over the resin layer so that the distortion stress applied on each portion can be relaxed. Further, the interface between the chip carrier and the solder, on which the greatest stress is apt to be applied, can be reinforced by the resin.